Random numbers can be found in a variety of applications within the engineering, technology, communication and computing science fields. Typically, the random number generators of hardware and/or software realization may comprise a pseudo-random generating embodiment that may use a seed basis for generating the sequence. But these seed based pseudo-random number generators can often result in an increased risk of predictability, wherein knowledge of an algorithm may offer an understanding of previous and future generated numbers. Although pseudo-random number generation may be suitable for certain applications such as for testing, because of its potential predictability, the pseudo-random generation may be inappropriate for other applications such as cryptography.
For secure cryptography applications, it may be essential that the security system implement a method for generating a random number that is completely random. For such true random number generator systems, a completely random password or cryptographic key may offer no prior knowledge that can be exploited or infiltrated by an adversary or malicious intruder. Ideally, a true random number generator may generate a sequence of numbers that is unpredictable, irreproducible and non-repeating. Traditional true random number generators have generally used means such as radiation decay, thermal noise or oscillator imperfections for purpose of generating numbers of a random distribution.
These types of systems have typically used a form of chaotic system, one in which its state may change over time in a largely unpredictable manner. Generally, some sensing means may sense and convert the state of a system into a sequence of, bits of, for example, a binary number. Previous chaotic systems have included sources such as the sound of radio static, the output of a noisy diode, or radiation decay.
A sensor can sense the noise event of the source and convert it into a digital signal. A pseudo-random binary string can be generated from the digital recording of static noise via a digital microphone. A noisy diode can be sampled at a suitable frequency and converted into a digital signal. A Geiger counter may sense the random decay of a radioactive source to establish data for a binary string.
It may be noted, however, that problems may result from the use of a chaotic system that is not completely random. For example, there may exist certain inherent localities within the system that may present a region of predictability. Such flaws may make these systems undesirable, at least for the basis of establishing secure cryptographic systems with unpredictable keys or encrypted bit streams.
Another disadvantage of some chaotic systems as a source of randomness relates to their efficiency in generating a digital signal and numbers therefrom. Such efficiency limitation may be overcome by use of pseudo-random number generators, which may deterministically generate a sequence of numbers by some computational process from an initial number called a seed. Such computational process may generate a sequence of numbers from the seed that may appear to be random. In other words, an outside observer cannot predict the next number to be generated from the list of numbers previously generated without expending a great deal of computational effort. Thus, to generate a long sequence of pseudo-random numbers, one need only generate a single true random number, which may be used as the seed for the pseudo-random number generator.
Despite its predictability, pseudo-random number generation can find some favor given that it may afford simple realizations. In contrast, customary embodiments for true random number generators are typically more cumbersome and perhaps incapable of realization in a self-contained device such as a within a field programmable gate array. Some have described the possibility of a “high-output generator that can plumb mere disorder and extract true randomness—a task, incidentally, beyond the reach of any computer on earth”. See Tom McNichol, “Totally Random: How two math geeks with a lava lamp and a webcam are about to unleash chaos on the Internet,” Wired, issue 11.08 (August 2003). But if a true random number generator were capable of simplified integration and/or capable of realization within a self-contained solution, then the true random number generator might be more widely accepted within a greater variety of system and/or process applications to offer devices of greater functionality, smaller size and higher security.
Concerning such features of device size and functionality, the semiconductor industry continually pushes for devices of greater density and smaller geometries. At the same time, the demand for increased data handling capability in combination with the desire for greater levels of integration has increased the premium for signal interfacing to a semiconductor device. Because of the reductions in I/O real estate, circuit realizations that may offer ability for self-containment within a semiconductor device can soften the I/O compromise that would otherwise result from size reductions.
Easing some of the effects of reduced I/O real estate, some manufacturers of high-speed data communication devices have developed transceivers with parallel-to-serial and serial-to-parallel data multiplexing/de-multiplexing circuit designs. By using these multiplexing circuits, the high-pin count, parallel data interfaces may be replaced with lower pin count, high-speed serial data interfaces. On a receiver side of a transceiver, for example, a high-speed serial data sequence may be received from an I/O link and then converted into parallel data of a slower clock rate. Conversely, on the transmission side of the transceiver, parallel data of a low-clock rate may be converted from the parallel format into a higher-speed, serial format.
Thus, transceivers with parallel-to-serial and serial-to-parallel multiplexing/de-multiplexing circuits may be integrated into data communication devices to enhance their data handling capability. As a result, such transceivers have found their way into various high-density, integrated circuits. Such circuits may include data communication devices, data processors, network modules, switchers, relays, gateways, modems, and in particular highly integrated programmable circuits, e.g., a programmable logic device (PLD) such as a Field Programmable Gate Array (FPGA).
To assist resolution of data from a serial data input signal, a clock recovery circuit of the transceiver may determine transitions of the input data signal and control a frequency/phase of a recovered internal clock in accordance with the relative frequency/phase placements of the received data signal. It may be understood, however, that in order to keep the frequency/phase of the internally recovered clock in synchronous relationship to that associated with the incoming data signal, the data signal received may need to employ an encoding/decoding protocol that can assure a sufficient number of transitions over a given interval or duration for enabling appropriate closed-loop control via the transitions of the serial data signal.
Some of these encoding/decoding protocols (e.g., Ethernet, Sonet, InfiniBand, Fibre Channel, etc.) may be described as a form of “non-return to zero” encoding. In a particular example, an 8-bit/10-bit (non-return to zero) protocol may encode data to assure that only a limited number (5 bits) of same-state data bits may occur consecutively within the data stream. In other words, it may assure that, e.g., only five data bits of same state (one or zero) may occur consecutively within the serial data stream. Else, absent a sufficient frequency of state transitions within the serial data signal, the clock generator of a clock recovery circuit might begin to drift or wander relative to the frequency/phase inherent within the input data signal.
Further, it may be understood that the reliability of the data recovery may depend upon the amount of drift/wandering, or “jitter,” attributable to transceivers and associated clock recovery circuits. In other words, the amount of wandering or drift that may be inherent within the transceiver may impact its jitter tolerance, which in turn may hinder its reliability with higher speed data transfers. The lower the performance or jitter tolerance, the lower its reliability and capability for high-speed serial data transfer.